SoC Architect
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TYLsemi
San Jose, CA, US
Summary
Define and drive the end-to-end architecture of next-generation XPUs for AI infrastructure, focusing on scalability and performance. This includes designing compute, memory, and IO subsystems while collaborating with design and DV teams for implementation.
Job Description
Role Overview
We are seeking a SoC Architect to define and drive the architecture of next-generation infrastructure. This role involves end-to-end ownership of system and SoC architecture, from concept to silicon, with a strong emphasis on scalability, performance, interconnects, and system-level optimization.
Key Responsibilities
- Define system architecture for complex SoCs, including IO, compute, interconnect and subsystems
- Drive architecture for scalable and modular designs, including chiplet-based systems (UCIe)
- Architect high-performance data movement across IO interfaces ( PCIe / UCIe / CXL / UALink / ESUN )
- Collaborate with design and DV teams to ensure architectural feasibility and efficient implementation
- Develop performance models and simulations to validate architecture choices
- Drive trade-offs across: Performance, Power, Area and Cost
- Work closely with customers and software teams to align architecture with real-world workloads
- Influence long-term roadmap and technology direction
- Define system-level verification and validation strategies
Required Qualifications
- Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Engineering, or related field
- 18+ years of experience in SoC or system architecture
- Proven track record of architecting complex SoCs for AI, HPC, or Networking
- Deep understanding of:
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- System-level design and trade-offs
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- High-speed IO protocols (UCIe, PCIe, Ethernet)
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- Data movement and interconnect design
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- Experience with performance modeling and architectural simulation
- Strong cross-functional collaboration skills
Preferred Qualifications
- Knowledge of coherency protocols (CXL, CHI.)
- Experience with power/performance optimization at system level
- Exposure to software-hardware co-design
- Experience with memory architectures (DDR, HBM, cache hierarchies)
- Familiarity with chiplet architectures and advanced packaging (2.5D/3D)
Key Attributes
- Strong system-level thinking and architectural vision
- Ability to balance innovation with practical execution
- High ownership and accountability
- Strong communication and leadership skills
Success Metrics
- Scalable and efficient SoC architectures across multiple generations
- Achievement of performance, power, and cost targets
- Strong alignment between architecture and silicon outcomes
- Reduced architectural rework through early validation
AI infrastructure silicon requires solutions on 3 fundamentals: Power, IO and Memory apart from compute architecture. With the necessity of chiplets based design, it demands a new kind of partner. A company that owns the full stack — architecture, silicon, packaging, supply chain, firmware — and delivers qualified silicon, not just code.
That's TylSemi.
We are hiring! Check and apply here: https://ats.rippling.com/tylsemi/jobs
Founded
2026
Company size
11-50 employees
Industry
Semiconductor Manufacturing
Org type
Privately Held
Headquarters
San Jose, California
AI infrastructure silicon requires solutions on 3 fundamentals: Power, IO and Memory apart from compute architecture. With the necessity of chiplets based design, it demands a new kind of partner. A company that owns the full stack — architecture, silicon, packaging, supply chain, firmware — and delivers qualified silicon, not just code.
That's TylSemi.
We are hiring! Check and apply here: https://ats.rippling.com/tylsemi/jobs
Founded
2026
Company size
11-50 employees
Industry
Semiconductor Manufacturing
Org type
Privately Held
Headquarters
San Jose, California